Re: STM32F4 GNAT Run Time System - roadmap

[Jere <jere.groups@gmail.com>]

On Monday, December 7, 2015 at 5:02:38 PM UTC-5, Simon Wright wrote:
> My RTS definitely works in the bare-metal environment. However, I'd have
> thought your board is on the small side? a fairly small demo used
> 
>    $ arm-eabi-size stairwell_arduino_demo
>       text	   data	    bss	    dec	    hex	filename
>     130716	   1992	  17152	 149860	  24964	stairwell_arduino_demo
> 
> If you're happy with zero footprint, check out
> http://www.inspirel.com/articles/Ada_On_Cortex.html

Yeah, I am running a 256k flash chip, so it looks a bit too tight.  I normally
 work in the 32k to 64k arena (but on chips that there is no chance on Ada due
 to lack of even GCC for their architecture).  Moving to this new chip (SAML21
 series from Atmel) gave me the option to possibly look at an Ada solution:
  There is a working GCC port for it and I have 4x the code space that I am
 used to.

Would a zero foot print run time be out of the question as well? Most of my
 projects tend to be 12k lines of code or less on average.  I realize I will
 have to shrink from that to allow room for all the runtime checks added by
 Ada, but I am hoping with a zero foot print run time, that I won't be getting
 a lot of other space being taken up.