From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 2002:a0c:c24f:: with SMTP id w15mr3190104qvh.66.1579878115697; Fri, 24 Jan 2020 07:01:55 -0800 (PST) X-Received: by 2002:a05:6830:1185:: with SMTP id u5mr2801660otq.147.1579878115182; Fri, 24 Jan 2020 07:01:55 -0800 (PST) Path: eternal-september.org!reader01.eternal-september.org!feeder.eternal-september.org!news.gegeweb.eu!gegeweb.org!usenet-fr.net!proxad.net!feeder1-2.proxad.net!209.85.160.216.MISMATCH!g89no6345088qtd.0!news-out.google.com!w29ni260qtc.0!nntp.google.com!g89no6345084qtd.0!postnews.google.com!google-groups.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Fri, 24 Jan 2020 07:01:54 -0800 (PST) In-Reply-To: <3eddd281-9d67-48c2-9cd4-5ad220444c0c@googlegroups.com> Complaints-To: groups-abuse@google.com Injection-Info: google-groups.googlegroups.com; posting-host=47.136.24.151; posting-account=o_Y23woAAACPYGlDsFV1OivhygPNSoRn NNTP-Posting-Host: 47.136.24.151 References: <4878f44b-9f82-45d0-86eb-a63894a2c5bf@googlegroups.com> <3eddd281-9d67-48c2-9cd4-5ad220444c0c@googlegroups.com> User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: <3842411e-b900-4b24-8614-6d034b1ad340@googlegroups.com> Subject: Re: Creating several types from a base type and conversion From: Ken Roberts Injection-Date: Fri, 24 Jan 2020 15:01:55 +0000 Content-Type: text/plain; charset="UTF-8" Xref: reader01.eternal-september.org comp.lang.ada:57934 Date: 2020-01-24T07:01:54-08:00 List-Id: On Friday, January 24, 2020 at 4:38:53 AM UTC-8, Optikos wrote: OK - here's what I'm looking at. Based upon the hardware I worked on (and documentation for the 642 system), apparently it's BE based: Register representation on panel: R bits 29 .. 0 where MSB is on the left and LSB on the right. Memory is 30 bits (just like registers) and is physically spread over 5 chassis with 6 bits of each word stored on each chassis: chassis 1 : bits 5 .. 0 chassis 2 : bits 11 .. 6 chassis 3 : bits 17 .. 12 chassis 4 : bits 23 .. 18 chassis 5 : bits 29 .. 24 If you look up to my third post you can see the basic setup of how a word is interpreted for instructions, with all calculations based on the msb .. lsb concept.