From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.5-pre1 (2020-06-20) on ip-172-31-74-118.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-1.9 required=3.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.5-pre1 Path: eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail From: Paul Rubin Newsgroups: comp.lang.ada Subject: Re: is there a version of unix written in Ada Date: Fri, 02 Oct 2020 14:24:56 -0700 Organization: A noiseless patient Spider Message-ID: <87362wl3rr.fsf@nightsong.com> References: <00cd3aaa-d518-43a2-b321-58d6fae70aebo@googlegroups.com> <57eb7a65-51ea-4624-b9dc-9c4dda0fee59n@googlegroups.com> <5f70fd3b$0$13541$426a74cc@news.free.fr> <87wo0d3iac.fsf@nightsong.com> <87sgb02l7b.fsf@nightsong.com> <875z7vyy1u.fsf@nightsong.com> Mime-Version: 1.0 Content-Type: text/plain Injection-Info: reader02.eternal-september.org; posting-host="48b6a69cd5a7821c692db7c8bfac35a1"; logging-data="22879"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18rO6Ww5TnaCldX1HQvOyWE" User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) Cancel-Lock: sha1:Zeklwjr1G2+mbXiLTY8L1ZZNpyE= sha1:R2wYB1m1VmgR8+M5sNGyPhT8kMo= Xref: reader02.eternal-september.org comp.lang.ada:60388 List-Id: Brian Drummond writes: > The Rekursiv's own language, Lingo... prove[d] that type safety and > dynamic binding are not mutually exclusive, and that hardware support > enforcing at runtime a lot of correctness [1] that Ada-95 did later at > compile time, was possible. 1) I don't know if the Rekursiv predated the Lisp machine, but maybe that did about the same? 2) Runtime checks don't really "count" for critical applications. They just ensure an orderly runtime crash if a type error manifests, but Ada is designed for writing applications that are simply not allowed to crash. 3) I wonder where the iAPX-32 comes into this. I think it was designed to run Ada, but I don't know much more about it. It turned out to be complicated enough that it had to be spread across 3 chips using the process technology of the time, and the inter-chip communication made it too slow to use. But I wonder, these days, if a single chip implementation would take as large a speed hit vs. conventional architectures as the 3 chip version did.