From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.5-pre1 (2020-06-20) on ip-172-31-74-118.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-1.8 required=3.0 tests=BAYES_00,PLING_QUERY autolearn=no autolearn_force=no version=3.4.5-pre1 Path: eternal-september.org!reader02.eternal-september.org!.POSTED!not-for-mail From: Paul Rubin Newsgroups: comp.lang.ada Subject: Re: Adapting an Ada compiler to generate 8051 code (Again?! ;-) Date: Tue, 30 Mar 2021 14:48:13 -0700 Organization: A noiseless patient Spider Message-ID: <87a6qk9uua.fsf@nightsong.com> References: <41bc7a62-9c70-466d-b316-5fc74a3ee845n@googlegroups.com> <87im58a1up.fsf@nightsong.com> Mime-Version: 1.0 Content-Type: text/plain Injection-Info: reader02.eternal-september.org; posting-host="ed14bc8a640c59e1aa19dcc6f31075a0"; logging-data="12231"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/doo42hTcMY2HSEktnB8FI" User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) Cancel-Lock: sha1:fDJ/m0d6/j/t5nR1Pz7J95/stYA= sha1:0TJryYBlrQIVa8CtFudIw8rUUkA= Xref: reader02.eternal-september.org comp.lang.ada:61694 List-Id: "Luke A. Guest" writes: >> there are any really large obstacles to targeting GCC to the 8051 > The biggest obstacles will be the severe lack of registers. But it's > possible, lm78 for example. Do you mean this? https://www.ti.com/lit/gpn/lm78 I wasn't familiar with it. It looks awful, a couple special purpose registers and something like 19 bytes of ram (I didn't look closely). Does gcc actually generate code for it? I don't know whether gcc targets any old-fashioned accumulator machines with no registers. I thought it did, but maybe not. I do know lots of people use it for the AVR8 / Aruino etc. It hadn't occurred to me but yeah, maybe gcc is built more around register architectures and sdcc works differently. I haven't really looked. I know SWEET16 is a 16 bit virtual machine that Steve Wozniak implemented on the 6502 in the original Apple II, to get higher code density than 6502 asm code. It had 16 registers. Doing something like that on an 8051 and targeting GCC to it sounds fairly plausible. I wouldn't be surprised if it's been done already. Does a minimal Ada runtime (Ravenscar or whatever) make particular demands that require much outside-the-compiler support? Adacore Ada-to-C is proprietary? Oh well. I wonder if generating C output from GCC intermediate code is terribly difficult.