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Brian Drummond <brian@shapes.demon.co.uk> writes:
> Formal methods have more traction in hardware (ASIC rather than FPGA) 
> design, so VHDL users might be very open to a SPARK-like prover. 

I think that ASIC formal methods (at least historically) relate mostly
to finite model checking.  I don't know if SPARK is really relevant
there.  I usually think of "theorem proving" as being about infinite
models, though of course that's not required.