From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 2002:a05:620a:1472:: with SMTP id j18mr3247515qkl.184.1579880419940; Fri, 24 Jan 2020 07:40:19 -0800 (PST) X-Received: by 2002:a9d:53cb:: with SMTP id i11mr3230284oth.158.1579880419383; Fri, 24 Jan 2020 07:40:19 -0800 (PST) Path: eternal-september.org!reader01.eternal-september.org!feeder.eternal-september.org!news.gegeweb.eu!gegeweb.org!usenet-fr.net!proxad.net!feeder1-2.proxad.net!209.85.160.216.MISMATCH!g89no6440521qtd.0!news-out.google.com!w29ni260qtc.0!nntp.google.com!g89no6440509qtd.0!postnews.google.com!google-groups.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Fri, 24 Jan 2020 07:40:18 -0800 (PST) In-Reply-To: Complaints-To: groups-abuse@google.com Injection-Info: google-groups.googlegroups.com; posting-host=47.136.24.151; posting-account=o_Y23woAAACPYGlDsFV1OivhygPNSoRn NNTP-Posting-Host: 47.136.24.151 References: <4878f44b-9f82-45d0-86eb-a63894a2c5bf@googlegroups.com> <3eddd281-9d67-48c2-9cd4-5ad220444c0c@googlegroups.com> <3842411e-b900-4b24-8614-6d034b1ad340@googlegroups.com> User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: Subject: Re: Creating several types from a base type and conversion From: Ken Roberts Injection-Date: Fri, 24 Jan 2020 15:40:19 +0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Xref: reader01.eternal-september.org comp.lang.ada:57936 Date: 2020-01-24T07:40:18-08:00 List-Id: On Friday, January 24, 2020 at 7:22:10 AM UTC-8, Simon Wright wrote: > Ken Roberts writes: >=20 > > Based upon the hardware I worked on (and documentation for the 642 > > system), apparently it's BE based: > > > > Register representation on panel: R bits 29 .. 0 > > > > where MSB is on the left and LSB on the right. >=20 > Looks LE to me. >=20 > If the panel shows >=20 > bit # ... 5 4 3 2 1 0 > lit ... 0 0 0 1 0 1 >=20 > and the value represented is 5 then it's little-endian; bit 0 is the > least significant bit. My concern would be in bit shifting operations, that if a bit is shifted le= ft 20 bits then: start: 000000000000000000000000000001 end : 000000000100000000000000000000 In one instruction for the 642, it combines two registers to make one 60-bi= t register for some operations, so representing both 30-bit and 60-bit regi= ster operations should be the same (assuming a 32-bit computer that should = have both 32-bit and 64-bit operations). At least that's what will have to be accomplished in the emulation. As noted earlier, the first pass of what I'm working on is the software emu= lation, but the long-term goal is to fully emulate the 642 computer using r= egister manipulations rather than just emulating the instructions. At least for now, the target hardware for compiling the system will probabl= y be a minimum 32-bit hardware (like the current intel 32/64 bit chipsets). One of the USQ20 system is also an 18-bit computer (CP789) - but I don't pl= an on emulating that for a while yet (if at all - since the 789 was used to= manage the KCMX, which was the interface to the older analog fire control = systems and not really needed for what I'm initially targeting the project = for).