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From: Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP>
Newsgroups: comp.lang.ada
Subject: Re: Forcing GNAT to use 32-bit load/store instructions on ARM?
Date: Sun, 20 Jul 2014 15:49:12 +0000 (UTC)
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Date: 2014-07-20T15:49:12+00:00
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On 2014-07-20, MatthiasR <MatthiasR@invalid.invalid> wrote:
>
> So, if a C compiler is AAPCS-compliant, volatile bitfields should have the 
> desired behaviour. Whether a compiler is *really* AAPCS-compliant, is 
> another question. A well-known open source C compiler had bugs in this area 
> in several releases. Last year, attempts were made to repair it. I don't 
> know the current status.
>

That open source C compiler wouldn't be called gcc by any chance
would it ? :-)

I did some experiments with using bitfields instead of bitmasks in
some bare metal ARM target C code a couple of years ago and ran into
the exact same problems as the OP's Ada code, with gcc's generated
code using ldrb instead of ldr.

I haven't tried building a ARM cross compiler using the very latest
versions of gcc however.

Simon.

-- 
Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP
Microsoft: Bringing you 1980s technology to a 21st century world