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From: Simon Wright <simon@pushface.org>
Newsgroups: comp.lang.ada
Subject: Re: ANN: Cortex GNAT RTS 2018-07-15
Date: Sat, 28 Jul 2018 12:18:48 +0100
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Date: 2018-07-28T12:18:48+01:00
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Paul Rubin <no.email@nospam.invalid> writes:

> Simon Wright <simon@pushface.org> writes:
>> I agree that a considerable chunk of FreeRTOS could probably be
>> replaced by straightforward Ada code, but that'd be someone else's
>> project!
>
> Thanks.  I wasn't suggesting that you rewrite FreeRTOS, but rather, I
> was just wondering if there were technical obstacles to doing such
> such machine-level stuff in Ada.

Not really: you are coming at things from underneath, so need a
different mindset. The tricky part is organising context swaps, I
think. GCC supports in-line assembler, so for instance you can tell
whether you're in an ISR on an ARM processor (v6, v7 anyway) by
an MRS instruction, and I have no doubt you can do the same for context
swaps; but it's very architecture-specific.

>> The RTOS part of AdaCore's embedded Ravenscar RTOSs (s-bb*.ad?) is
>> about 5500 lines (1250 semicolons) of Ada.
>
> Fabien also Chouteau mentioned this.  Does it do mostly the same stuff
> as FreeRTOS?  I had thought Ravenscar was deliberately very limited.

Ravenscar limits what tasks/protected objects can do (for example, tasks
must be declared at library level; tasks mustn't exit; no task entries;
POs can only have one entry) which (a) makes it possible to argue about
correctness and (b) greatly reduces the complexity of the RTS. AdaCore's
RTS does considerably more than I've implemented in Cortex GNAT RTS,
e.g. multiprocessing - which I think FreeRTOS would support - but it's
still Ravenscar tasking.