From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on ip-172-31-74-118.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=unavailable autolearn_force=no version=3.4.4 Path: eternal-september.org!reader01.eternal-september.org!feeder.eternal-september.org!aioe.org!.POSTED.IIfIc3CB/+nKo+wKq8+a0g.user.gioia.aioe.org!not-for-mail From: Simon Wright Newsgroups: comp.lang.ada Subject: Re: Ada on Apple's new procesors Date: Thu, 25 Jun 2020 12:03:14 +0100 Organization: Aioe.org NNTP Server Message-ID: References: <4d9fa282-830d-42f7-a3bf-ba127cb2ad06o@googlegroups.com> <8332f305-299f-45d7-9f9d-2cad924b24d8o@googlegroups.com> <9d941aca-2eb6-4f35-a346-c290c4666bdfo@googlegroups.com> <76def2a5-667c-4009-b3b9-f0cf1c13a51bo@googlegroups.com> NNTP-Posting-Host: IIfIc3CB/+nKo+wKq8+a0g.user.gioia.aioe.org Mime-Version: 1.0 Content-Type: text/plain X-Complaints-To: abuse@aioe.org User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (darwin) X-Notice: Filtered by postfilter v. 0.9.2 Cancel-Lock: sha1:pBXWCJZlYeD13cem043vp7QmXu8= Xref: reader01.eternal-september.org comp.lang.ada:59224 List-Id: charlet@adacore.com writes: >> > That's correct, there is no issue here. The GNAT LLVM compiler is a >> > tool and is licensed under GPLv3, which is just fine and the proper >> > license for a tool. The runtime which is linked with your >> > executable comes from the gcc.gnu.org repository and contains the >> > GCC RunTime exception license. >> > >> >> Can you confirm that using FSF GNAT with GNAT-LLVM (GPLv3) does or >> does not enable the IR clause in the GPLv3? > > It does not and in any case, invoking this clause is a red herring > since as explained in the license, the concern and what's not allowed > is using an intermediate representation and feed it to a proprietary > (non-GPL-compatible) software to e.g. optimize it or further process > it. Optikos has (at last) made clear his concerns about this: if it is indeed the case that Apple require App Store developers to deliver bitcode for further proprietary optimizations then there might be an issue. Depends on whether LLVM IR (which I understand is logically equivalent to bitcode) can count as target code? I've seen it described as LLVM assembler ...