ANN: Cortex GNAT RTS 2018-07-15

ANN: Cortex GNAT RTS 2018-07-15

[Simon Wright]

Available at [1].

This release supports the BBC micro:bit (tick is 10 ms, rather than the
1 ms for other targets).

The interrupt, environment and default task stack sizes can be
controlled (by a rather weird technique involving importing weak
external symbols!)

FreeRTOS version 10.0.1 is used; it's now licensed under MIT terms,
which is definitely GPLv3 compatible.

[1] https://github.com/simonjwright/cortex-gnat-rts/releases/tag/r20180715

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Simon Wright <simon@pushface.org> writes:
> This release supports the BBC micro:bit (tick is 10 ms, rather than the
> 1 ms for other targets).

Thanks for continuing doing this.

Can you say about how hard it is to port GNAT RTS to a new board, given
a reasonable C environment for the board?  How much code space and ram
is required?

Boards I'm interested include the cheapo "Blue Pill" (Maple Mini clone,
i.e. Cortex M3 with specs 64k of flash and 20k of ram, though most of
them seem to have 128k of flash instead of the 64k specified),
Adafruit's SAMD21/SAMD51 boards (Trinket M0, and Itty Bitty and Feather
M0 and M4), and PJRC's Teensy boards.

I'd be happy to send you a Blue Pill if you want one.  They are similar
to this: https://www.banggood.com/-p-1058299.html

They are under 2 USD each on Aliexpress though I can't give a url there
because of how their ordering system change.

Thanks!

Re: ANN: Cortex GNAT RTS 2018-07-15

[fabien.chouteau]

On Sunday, July 15, 2018 at 11:53:30 PM UTC+2, Paul Rubin wrote:
> Boards I'm interested include the cheapo "Blue Pill" (Maple Mini clone,
> i.e. Cortex M3 with specs 64k of flash and 20k of ram, though most of
> them seem to have 128k of flash instead of the 64k specified),
> Adafruit's SAMD21/SAMD51 boards (Trinket M0, and Itty Bitty and Feather
> M0 and M4), and PJRC's Teensy boards.
> 

Hedley Rainnie ported the runtimes for the bluepill:
http://www.hrrzi.com/2017/11/ada-on-2-ebay-bluepill-board.html

I'm also interested in all the boards you mention so let me know if make something with them.

(Shameless plug, this would make good project for the makewithada.org competition)

Re: ANN: Cortex GNAT RTS 2018-07-15

[Simon Wright]

Paul Rubin <no.email@nospam.invalid> writes:

> Can you say about how hard it is to port GNAT RTS to a new board,
> given a reasonable C environment for the board?  How much code space
> and ram is required?

I don't know about the AdaCore RTS, but I imagine it'll be much the same
as this one (after you've got to grips with the deeply nested,
use-clause-happy code :-)

For this one, I started on 1 July and had a working RTS (bar an issue
with the board clock, discovered later) by 4 July.

The issues (once you have a base RTS for one ARM board) are

* startup, any RAM/Flash/FPU settings, clock
* interrupts, interrupt priority range, names

For the micro:bit, compiling with -O0 and assertions enabled, I get, for
the RTS + other support, in a program with delays, a task, and an
interrupt-handling PO,

text
        libgcc      1380
        gnat       10132
        freertos    7724
        libc         280

rodata
        gnat        1252

data
        gnat         220
        freertos       4

bss
        gnat          68
        freertos     340

The base RAM use (data + bss) for this program was 900 bytes. Out of the
remaining RAM (15484), it used (via heap allocations)

initial/interrupt stack   1024
environment task stack    1536
1 task stack              1024
others?                    828

and the free heap was 11072 (those numbers don't quite add up, I think
there's some overhead in the heap management maybe).

I'm not sure why the environment task stack needs to be so high (it does
elaboration + Ada main). The task stack could probably be lower, one
outstanding job is to work out a way of measuring task stack usage.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Simon Wright]

Paul Rubin <no.email@nospam.invalid> writes:

> Boards I'm interested include the cheapo "Blue Pill" (Maple Mini
> clone, i.e. Cortex M3 with specs 64k of flash and 20k of ram, though
> most of them seem to have 128k of flash instead of the 64k specified),
> Adafruit's SAMD21/SAMD51 boards (Trinket M0, and Itty Bitty and
> Feather M0 and M4), and PJRC's Teensy boards.
>
> I'd be happy to send you a Blue Pill if you want one.  They are
> similar to this: https://www.banggood.com/-p-1058299.html

A kind thought! but as Fabien says, it's already been done. Might look
at one of the others (though I had been thinking of something bigger
rather than smaller, e.g. STM32F7).

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Simon Wright <simon@pushface.org> writes:
> A kind thought! but as Fabien says, it's already been done. Might look
> at one of the others (though I had been thinking of something bigger
> rather than smaller, e.g. STM32F7).

Hmm, I guess I have two Trinket M0's (actually one of them is a Gemma,
same board except circular in shape) if you want one of those.

STM32F7 has struck me as a little bit weird, an unhappy medium between
the M3/M4 series and more powerful A-series application processors,
multicores, etc.  The application niche for them must be rather narrow.

Re: ANN: Cortex GNAT RTS 2018-07-15

[fabien.chouteau]

On Tuesday, July 17, 2018 at 4:14:30 AM UTC+2, Paul Rubin wrote:
> STM32F7 has struck me as a little bit weird, an unhappy medium between
> the M3/M4 series and more powerful A-series application processors,
> multicores, etc.  The application niche for them must be rather narrow.

STMicro is pushing a lot in the direction of "smartphone like user interfaces" for their micro-controller. I think the M7 is part of that strategy.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

fabien.chouteau@gmail.com writes:
> STMicro is pushing a lot in the direction of "smartphone like user
> interfaces" for their micro-controller. I think the M7 is part of that
> strategy.

But why not use a smartphone chip if you want a smartphone UI?  You can
get a complete Raspberry Pi Zero for less than the cost of an M7 CPU all
by itself.

Re: ANN: Cortex GNAT RTS 2018-07-15

[fabien.chouteau]

On Tuesday, July 17, 2018 at 11:43:09 AM UTC+2, Paul Rubin wrote:
> fabien chouteau writes:
> > STMicro is pushing a lot in the direction of "smartphone like user
> > interfaces" for their micro-controller. I think the M7 is part of that
> > strategy.
> 
> But why not use a smartphone chip if you want a smartphone UI?  You can
> get a complete Raspberry Pi Zero for less than the cost of an M7 CPU all
> by itself.

Power consumption, cost at lower volume, complexity of the hardware, ruggedness, smaller software.

I agree that with M7 at 700MHz the line between Cortex-A and Cortex-M is very thin.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Simon Wright]

Paul Rubin <no.email@nospam.invalid> writes:

> Simon Wright <simon@pushface.org> writes:
>> A kind thought! but as Fabien says, it's already been done. Might
>> look at one of the others (though I had been thinking of something
>> bigger rather than smaller, e.g. STM32F7).
>
> Hmm, I guess I have two Trinket M0's (actually one of them is a Gemma,
> same board except circular in shape) if you want one of those.

Just a little bit too tiny for me! (8K flash, 512b ram). Candidates for
a ZFP, I think.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Simon Wright <simon@pushface.org> writes:
>> I have two Trinket M0's
> Just a little bit too tiny for me! (8K flash, 512b ram). Candidates for
> a ZFP, I think.

8k flash is on the original Trinket with the ATTiny85.  The Trinket M0
has 256k flash and 32k ram and when you plug it into a USB port out of
the box, it's already running CircuitPython and you can type Python code
at it interactively, and you can also drag and drop files onto it since
it also presents a USB flash drive interface.  It's great.

See: https://www.adafruit.com/product/3500

There is a slightly bigger version called the Itsy Bitsy that's
basically the same board with more I/O pins and a 2MB SPI flash added:

  https://www.adafruit.com/product/3727

And a version of the Itsy Bitsy with a Cortex M4, 512k of on-chip
flash and 192k of ram, plus the SPI flash:

  https://www.adafruit.com/product/3800

There's also the even fancier Feather series, with more stuff on the M0
and M4 versions including an RTC crystal and a built-in JST connector
and lipo charger, so you can connect a lipo cell that automatically
charges whenever the board is connected to USB.  A completely no-fuss
way to make a low powered portable gadget.

Unfortunately there's no Trinket M4 in the works because the M4
processor has a bigger package that won't fit on the Trinket board.

These boards are cool as hell and they make it leagues easier to get
started with embedded programming.  You don't need any toolchain on your
PC except a text editor.  It's like an old Forth system but much nicer.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Paul Rubin <no.email@nospam.invalid> writes:
> Trinket M0 has 256k flash and 32k ram...

By the way, the below seems to have similar specs and it's REALLY tiny
and comes from the UK (if that's where you are).  I haven't tried one,
but only just came across that page:

https://www.tindie.com/products/Nerdonic/nerdonic-exen-mini-smallest-32bit-dev-board/

Re: ANN: Cortex GNAT RTS 2018-07-15

[Dmitry A. Kazakov]

On 2018-07-17 21:46, Paul Rubin wrote:
> Simon Wright <simon@pushface.org> writes:
>>> I have two Trinket M0's
>> Just a little bit too tiny for me! (8K flash, 512b ram). Candidates for
>> a ZFP, I think.
> 
> 8k flash is on the original Trinket with the ATTiny85.  The Trinket M0
> has 256k flash and 32k ram and when you plug it into a USB port out of
> the box, it's already running CircuitPython and you can type Python code
> at it interactively, and you can also drag and drop files onto it since
> it also presents a USB flash drive interface.  It's great.

Well, there will be no place left for actual programming. There are lots 
of such boards on the net running various interpreters, e.g. Lua.

People keep on breaking out in order to save place and CPU cycles by 
programing in C. Ada without tasking and other useful features would be 
in the same league as C in terms of memory use and performance.

-- 
Regards,
Dmitry A. Kazakov
http://www.dmitry-kazakov.de

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

"Dmitry A. Kazakov" <mailbox@dmitry-kazakov.de> writes:
>> you can type Python code at it interactively, and you can also drag
>> and drop files onto it since it also presents a USB flash drive
>> interface.  It's great.
>
> Well, there will be no place left for actual programming. There are
> lots of such boards on the net running various interpreters, e.g. Lua.

The Trinket is a dinky little MCU board that will be controlling a fish
tank heater or something.  There's not enough space for a large program
but it's not intended for that type of application.  It comes with about
25k of free space and you can free up some more (maybe another 25k?)  by
deleting some unneeded libraries.  The bigger boards have the 2MB SPI
flash chip which is tons of space for stuff like this.

> People keep on breaking out in order to save place and CPU cycles by
> programing in C.

Yes you might want to drop down to C for speed, or just delete Python
completely from the board and run the Arduino toolkit, or (as we're
discussing here) the GNAT RTS.  Again it depends on the application but
the 32k of ram on the M0 is enough to run typical programs.  MicroPython
also runs on the BBC micro:bit which has only 16k of ram, but that's
significantly more cramped.  Of course the M4 version of the Adafruit
board has 192k of ram, bigger than the old minicomputers some of us
remember.

> Ada without tasking and other useful features would be in the same
> league as C in terms of memory use and performance.

I think Simon mentioned that GNAT RTS uses FreeRTOS for tasking.
FreeRTOS is pretty small (https://freertos.org/FAQMem.html) and the rest
of the GNAT RTS is not that large either, for these chips or even for
the Bluepill.  But, I know of Forth multitaskers using only a few dozen
lines of code altogether, and less than 100 bytes of ram per task
depending on stack and cell size.  I've played a little with STM8 eForth
which is an interactive interpreter supporting 2 tasks, using around 4k
of flash memory and again, maybe 100 bytes of ram.  The STM8 board
itself has 8k of flash and 1k of ram and is almost a throwaway.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Tero Koskinen]

Hi,

Simon Wright wrote on 17.7.2018 16.14:
> Paul Rubin <no.email@nospam.invalid> writes:
> 
>> Simon Wright <simon@pushface.org> writes:
>>> A kind thought! but as Fabien says, it's already been done. Might
>>> look at one of the others (though I had been thinking of something
>>> bigger rather than smaller, e.g. STM32F7).
>>
>> Hmm, I guess I have two Trinket M0's (actually one of them is a Gemma,
>> same board except circular in shape) if you want one of those.
> 
> Just a little bit too tiny for me! (8K flash, 512b ram). Candidates for
> a ZFP, I think.

I have samd21-zfp port for GNAT GPL at 
https://bitbucket.org/tkoskine/zfp-samd21

It isn't complete yet, but you can do simple blink led apps with it.

And if you dislike Adacore's codebase, I have AVR-Ada style runtime for 
samd21 & FSF GNAT combo at:
https://bitbucket.org/tkoskine/samd-ada

Here example code for samd21-zfp:
with Interfaces;

package GPIO is
    type Port_Type is (PORT_A, PORT_B);

    subtype GPIO_Pin_Type is Interfaces.Unsigned_8;

    procedure Set_Output (GPIO_Port : Port_Type;
                          GPIO_Pin : GPIO_Pin_Type);

    procedure Set_State (GPIO_Port : Port_Type;
                         GPIO_Pin : GPIO_Pin_Type;
                         State : Boolean);
end GPIO;

with ATSAMD21G18A.PORT;

package body GPIO is
    use Interfaces;
    use ATSAMD21G18A.PORT;
    use ATSAMD21G18A;
    procedure Set_Output (GPIO_Port : Port_Type;
                          GPIO_Pin : GPIO_Pin_Type) is
    begin
       if GPIO_Port = PORT_A then
          PORT0_Periph.OUTSET := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          PORT0_Periph.DIRSET := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          PORT0_Periph.PINCFG (Natural (GPIO_Pin)) := (0, 0, 0, 0, 0, 0);
       else
          PORT1_Periph.OUTSET := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          PORT1_Periph.DIRSET := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          PORT1_Periph.PINCFG (Natural (GPIO_Pin)) := (0, 0, 0, 0, 0, 0);
       end if;
    end Set_Output;

    procedure Set_State (GPIO_Port : Port_Type;
                         GPIO_Pin : GPIO_Pin_Type;
                         State : Boolean) is
    begin
       if GPIO_Port = Port_A then
          if State then
             PORT0_Periph.OUTSET := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          else
             PORT0_Periph.OUTCLR := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          end if;
       else
          if State then
             PORT1_Periph.OUTSET := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          else
             PORT1_Periph.OUTCLR := Shift_Left (Uint32 (1), Natural 
(GPIO_Pin));
          end if;
       end if;
    end Set_State;
end GPIO;with GPIO;

procedure Main is

begin
    GPIO.Set_Output (GPIO.PORT_A, 17);
    loop
       GPIO.Set_State (GPIO.PORT_A, 17, True);
       GPIO.Set_State (GPIO.PORT_A, 17, False);
    end loop;
end Main;


-Tero

Ps. I also have several SAMD5x boards (including Adafruit's Metro M4 and 
ItsyBitsy M4). Once I have some free time (in a year or two?), I'll 
create zfp runtime for them also.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Tero Koskinen <tero.koskinen@iki.fi> writes:
> Ps. I also have several SAMD5x boards (including Adafruit's Metro M4
> and ItsyBitsy M4). Once I have some free time (in a year or two?),
> I'll create zfp runtime for them also.

This is great.  Given that the company is called Adafruit, maybe they
should ship the boards with Ada already on them ;-).

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Simon Wright <simon@pushface.org> writes:
>         freertos...

I took a look at the freertos source code: the common kernel is 3 files
total around 10 KLOC of C, though a lot of it is conditionally compiled
based on feature flags.  It's about what you'd expect in an RTOS, i.e.
very low level, lots of pointer banging, critical sections, etc.

I wonder whether it's feasible to write something like that in Ada, with
just a few calls to intrinsics for stuff like interrupts.  Any thoughts?
It seems like a shame to have that much C code at the bottom of an Ada
application.

Re: ANN: Cortex GNAT RTS 2018-07-15

[fabien.chouteau]

On Friday, July 27, 2018 at 11:07:04 AM UTC+2, Paul Rubin wrote:
> Simon Wright <> writes:
> >         freertos...
> 
> I wonder whether it's feasible to write something like that in Ada, with
> just a few calls to intrinsics for stuff like interrupts.  Any thoughts?
> It seems like a shame to have that much C code at the bottom of an Ada
> application.

AdaCore's Ravenscar run-time is an RTOS 100% in Ada, you can try it out with GNAT Community.

I also have this toy project RTOS library: https://github.com/Fabien-Chouteau/AGATE

Re: ANN: Cortex GNAT RTS 2018-07-15

[Simon Wright]

Paul Rubin <no.email@nospam.invalid> writes:

> Simon Wright <simon@pushface.org> writes:
>>         freertos...
>
> I took a look at the freertos source code: the common kernel is 3
> files total around 10 KLOC of C, though a lot of it is conditionally
> compiled based on feature flags.  It's about what you'd expect in an
> RTOS, i.e.  very low level, lots of pointer banging, critical
> sections, etc.
>
> I wonder whether it's feasible to write something like that in Ada, with
> just a few calls to intrinsics for stuff like interrupts.  Any thoughts?
> It seems like a shame to have that much C code at the bottom of an Ada
> application.

FreeRTOS has the advantage of existing, with many targets, with the
possibility of support, with options such as file systems & networking,
and being libre.

At the time I started with Cortex GNAT RTS, aside from it being an
interesting project, there was quite a lot of chat about the fact that
GNAT GPL (now CE) was pure GPL. I was also familiar with GNAT's
VxWorks(5.3) target, also running over an RTOS, so running over an RTOS
was quite natural.

I agree that a considerable chunk of FreeRTOS could probably be replaced
by straightforward Ada code, but that'd be someone else's project!

The RTOS part of AdaCore's embedded Ravenscar RTOSs (s-bb*.ad?) is about
5500 lines (1250 semicolons) of Ada.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Paul Rubin]

Simon Wright <simon@pushface.org> writes:
> I agree that a considerable chunk of FreeRTOS could probably be replaced
> by straightforward Ada code, but that'd be someone else's project!

Thanks.  I wasn't suggesting that you rewrite FreeRTOS, but rather, I
was just wondering if there were technical obstacles to doing such such
machine-level stuff in Ada.

> The RTOS part of AdaCore's embedded Ravenscar RTOSs (s-bb*.ad?) is about
> 5500 lines (1250 semicolons) of Ada.

Fabien also Chouteau mentioned this.  Does it do mostly the same stuff
as FreeRTOS?  I had thought Ravenscar was deliberately very limited.

I've never used a thing like this and I've seen some incredibly tiny
Forth multitaskers, like a few dozen lines of code.  They basically
implement a context switch called from a cooperative PAUSE primitive,
plus a round robin scheduler and a few other things for starting and
stopping tasks.  So I should try to figure out what additional functions
the RTOS does.

Re: ANN: Cortex GNAT RTS 2018-07-15

[Simon Wright]

Paul Rubin <no.email@nospam.invalid> writes:

> Simon Wright <simon@pushface.org> writes:
>> I agree that a considerable chunk of FreeRTOS could probably be
>> replaced by straightforward Ada code, but that'd be someone else's
>> project!
>
> Thanks.  I wasn't suggesting that you rewrite FreeRTOS, but rather, I
> was just wondering if there were technical obstacles to doing such
> such machine-level stuff in Ada.

Not really: you are coming at things from underneath, so need a
different mindset. The tricky part is organising context swaps, I
think. GCC supports in-line assembler, so for instance you can tell
whether you're in an ISR on an ARM processor (v6, v7 anyway) by
an MRS instruction, and I have no doubt you can do the same for context
swaps; but it's very architecture-specific.

>> The RTOS part of AdaCore's embedded Ravenscar RTOSs (s-bb*.ad?) is
>> about 5500 lines (1250 semicolons) of Ada.
>
> Fabien also Chouteau mentioned this.  Does it do mostly the same stuff
> as FreeRTOS?  I had thought Ravenscar was deliberately very limited.

Ravenscar limits what tasks/protected objects can do (for example, tasks
must be declared at library level; tasks mustn't exit; no task entries;
POs can only have one entry) which (a) makes it possible to argue about
correctness and (b) greatly reduces the complexity of the RTS. AdaCore's
RTS does considerably more than I've implemented in Cortex GNAT RTS,
e.g. multiprocessing - which I think FreeRTOS would support - but it's
still Ravenscar tasking.