Is there a translator from SPARK Ada to VHDL?

Is there a translator from SPARK Ada to VHDL?

[Jim]

Hello, 

Does somebody here know, how to translate a hardware description code
of Spark Ada/Ada in VHDL for FPGA/CPLD? Is there automatic tools for
these translation?
Can I program code for FPGA with Spark Ada? 

please help me! 


thank you very much

Jim

Re: Is there a translator from SPARK Ada to VHDL?

[Stephen Leake]

happy_teddys@hotmail.com (Jim) writes:

> Hello, 
> 
> Does somebody here know, how to translate a hardware description code
> of Spark Ada/Ada in VHDL for FPGA/CPLD? Is there automatic tools for
> these translation?
> Can I program code for FPGA with Spark Ada? 

VHDL has a similar syntax to Ada, but it is really a different
language; the semantics are oriented towards parallel processing of
many small gates, as opposed to serial processing of one main
processor.

You need a VHDL compiler that targets your FPGA. Spark does not; it
only targets mainstream computer chips.

Perhaps if you explained a little more about what you are doing, we
could help more.

-- 
-- Stephe

Re: Is there a translator from SPARK Ada to VHDL?

[Upkeep]

Jim wrote:

> Does somebody here know, how to translate a hardware description code
> of Spark Ada/Ada in VHDL for FPGA/CPLD? Is there automatic tools for
> these translation?
> Can I program code for FPGA with Spark Ada?
>
> please help me!

Straightforward search in Google for "Ada VHDL translator" immediately
brings "Ada to Behavioral VHDL Translator" in many references.

Re: Is there a translator from SPARK Ada to VHDL?

[Vinzent 'Gadget' Hoefler]

Stephen Leake wrote:

> VHDL has a similar syntax to Ada, but it is really a different
> language; the semantics are oriented towards parallel processing of
> many small gates, as opposed to serial processing of one main
> processor.

A while ago I thought the same, but this seems to have changed.

> You need a VHDL compiler that targets your FPGA. Spark does not; it
> only targets mainstream computer chips.

<URI:http://www.praxis-his.com/sparkada/publications.asp#hardware>

According to the paper there, it somehow does. :-)


Vinzent.

Re: Is there a translator from SPARK Ada to VHDL?

[Peter Amey]

Vinzent 'Gadget' Hoefler wrote:
> Stephen Leake wrote:
> 
> 
>>VHDL has a similar syntax to Ada, but it is really a different
>>language; the semantics are oriented towards parallel processing of
>>many small gates, as opposed to serial processing of one main
>>processor.
> 
> 
> A while ago I thought the same, but this seems to have changed.
> 
> 
>>You need a VHDL compiler that targets your FPGA. Spark does not; it
>>only targets mainstream computer chips.
> 
> 
> <URI:http://www.praxis-his.com/sparkada/publications.asp#hardware>
> 
> According to the paper there, it somehow does. :-)
> 
> 

We have done some work on SPARK as a hardware description language but 
there certainly isn't an off-the-shelf, mature product yet.  You might 
like to contact my coleague Adrian Hilton about this - his PhD was on 
exactly this topic.

I'll forward mails to sparkinfo@praxis-his.com to him if you like (or 
you can deduce his email address from mine and from his name if you prefer!)

Peter

Re: Is there a translator from SPARK Ada to VHDL?

[Suslik]

Upkeep wrote:
> Straightforward search in Google for "Ada VHDL translator"
immediately
> brings "Ada to Behavioral VHDL Translator" in many references.

Yep, that's Sheraga's work.  He did something similar with C too.

The big problem is that behavioural VHDL (expressive, remarkably like
Ada in syntax including a reasonable type system and iterative control
structures) is not the same thing as synthesizable VHDL (very small
subset, limited to reacting to signals on wires and updating state).
And your VHDL must be synthesizable in order to load it onto an FPGA or
produce an ASIC design.  Since mapping from behavioural to
synthesizable VHDL is very hard in the general case, you have a
problem.  (A secondary problem is that there is still not agreement on
what VHDL is really synthesizable, although some progress has been made
with a working group in this area).

The eventual aim of the work I started on SPARK-to-VHDL was to provide
a synthesizable VHDL implementation of SPARK programs.  A key step is
to route through the Pebble synchronous hardware description language
which maps nicely onto synthesizable VHDL.  You can choose to produce a
pipelined implementation or a machine that executes SPARK pseudo-code.
I also looked at how you can take a selected portion of a SPARK
program, implement it in hardware, and replace its implementation with
a handshaking interface to the hardware while still keeping the SPARK
program description correct.

More than (100 - 10^-4)% of people can conceivably want to know about
this topic is described in the publications at
http://www.suslik.org/Personal/publics.html
which includes my PhD thesis.  You might also want to have a look at
what Neil Audsley and Michael Ward from York University have been doing
on synthesizing legacy Ada (SPARK, if memory serves) into a state
machine implementation on a PLD; the York Hardware Compiler, I believe.
Hope this helps,

Adrian

Re: Is there a translator from SPARK Ada to VHDL?

[Jim]

"Suslik" <adi.google.@suslik.org> wrote in message news:<1106480549.963006.322830@z14g2000cwz.googlegroups.com>...
> Upkeep wrote:
> > Straightforward search in Google for "Ada VHDL translator"
> immediately
> > brings "Ada to Behavioral VHDL Translator" in many references.
> 
> Yep, that's Sheraga's work.  He did something similar with C too.
> 
> The big problem is that behavioural VHDL (expressive, remarkably like
> Ada in syntax including a reasonable type system and iterative control
> structures) is not the same thing as synthesizable VHDL (very small
> subset, limited to reacting to signals on wires and updating state).
> And your VHDL must be synthesizable in order to load it onto an FPGA or
> produce an ASIC design.  Since mapping from behavioural to
> synthesizable VHDL is very hard in the general case, you have a
> problem.  (A secondary problem is that there is still not agreement on
> what VHDL is really synthesizable, although some progress has been made
> with a working group in this area).
> 
> The eventual aim of the work I started on SPARK-to-VHDL was to provide
> a synthesizable VHDL implementation of SPARK programs.  A key step is
> to route through the Pebble synchronous hardware description language
> which maps nicely onto synthesizable VHDL.  You can choose to produce a
> pipelined implementation or a machine that executes SPARK pseudo-code.
> I also looked at how you can take a selected portion of a SPARK
> program, implement it in hardware, and replace its implementation with
> a handshaking interface to the hardware while still keeping the SPARK
> program description correct.

thank you for your reply. I think, that the Spark Ada isn't suitable
for hardware description, special for FPGA in safety critical systems,
because man must translates from Ada code into Pebble, then into VHDL,
in this procedure how can man assure that no errors of the code are
arisen? Furthermore why do you use Pebble? Why does man translate from
Ada direct into VHDL code, then  with the other synthesis tool
e.g.Xilinx WebPack write VHDL code in FPGA.?
 
I think, maybe Spark Ada is appropriate for the design of a complex
system(e.g. Hardware/Software co-design similar to SystemC) , very
safe language for the software desription.

Jim

Re: Is there a translator from SPARK Ada to VHDL?

[Paul Colin Gloster]

In article <2e9040a1.0502101003.3f46ce16@posting.google.com>, Jim wrote:
"[..]
 
[..] I think, that the Spark Ada isn't suitable
for hardware description, special for FPGA in safety critical systems,
[..] then  with the other synthesis tool
e.g.Xilinx WebPack write VHDL code in FPGA.?

[..]"

Xilinx WebPACK is not suitable for safety critical systems.

Re: Is there a translator from SPARK Ada to VHDL?

[Colin Paul Gloster]

On Fri, 20 Jan 2005, Stephen Leake wrote:

"VHDL has a similar syntax to Ada, but it is really a different
language; the semantics are oriented towards parallel processing of
many small gates, as opposed to serial processing of one main
processor.

[..]"

Behavorial VHDL and the equivalent of representation clauses do resemble 
Ada, but synthesizable VHDL (as opposed to VHDL for simulators -- one of 
the funny things about VHDL and Verilog, so much work put into a supposed 
simulation without tool support for reification) is not parallel.